Xilinx Vitis Core Development Kit 2020.1 x64 (Linux)

Xilinx, Inc., the leader in adaptive and intelligent computing, is pleased to announce the availability of Vitis (pronounced Vī-tis) Core Development Kit 2020.1, a unified software platform that enables a broad new range of developers – including software engineers and AI scientists – to take advantage of the power of hardware adaptability.

Vitis Core Development Kit 2020.1 – Date: August 7, 2020
– 500+ FPGA-accelerated functions spread across 11 open-source Vitis libraries
– New Vitis HLS compiler for custom C/C++ kernel design with familiar programming constructs
– Improved RTL Kernel integration within Vitis applications
– Higher-level Xilinx Runtime Library (XRT) APIs for easier communication with deployed Kernels
– Better visibility into Kernel & System Performance and actionable insights for improving performance
– Enhancements for easier custom Vitis Target Platform creation for Embedded Platforms
– Open-source Xilinx FPGA Resource Manager (XRM) for Server-based Computing Orchestration

PDF Version of Documentation
Download a PDF of this content, Vitis Unified Software Platform Documentation:

The Vitis unified software platform is a new tool that combines all aspects of Xilinx software development into one unified environment. The Vitis software platform supports both the Vitis embedded software development flow, for Xilinx Software Development Kit (SDK) users looking to move into the next generation technology, and the Vitis application acceleration development flow, for software developers looking to use the latest in Xilinx FPGA-based software acceleration. This content is primarily concerned with the application acceleration flow, and use of the Vitis core development kit and Xilinx Runtime (XRT).

The Vitis application acceleration development flow provides a framework for developing and delivering FPGA accelerated applications using standard programming languages for both software and hardware components. The software component, or host program, is developed using C/C++ to run on x86 or embedded processors, with OpenCL API calls to manage runtime interactions with the accelerator. The hardware component, or kernel, can be developed using C/C++, OpenCL C, or RTL. The Vitis software platform accommodates various methodologies, letting you start by developing either the application or the kernel.

Vivado QuickTake Tutorials
Xilinx is the inventor of the FPGA, programmable SoCs, and now, the ACAP. Our highly-flexible programmable silicon, enabled by a suite of advanced software and tools, drives rapid innovation across a wide span of industries and technologies – from consumer to cars to the cloud. Xilinx delivers the most dynamic processing technology in the industry, enabling rapid innovation with its adaptable, intelligent computing.

Product: Xilinx Vitis Core Development Kit
Version: 2020.01 *
Supported Architectures: x64
Website Home Page : http://www.xilinx.com
Language: english
System Requirements: Linux **
Size: 36.7 Gb

– Unified Installer installs Vitis Core Development Kit 2020.1. Vitis Libraries, Xilinx Runtime library(XRT), Xilinx FPGA Resource Manager(XRM) and Vitis Target Platforms Available as separate downloads.
– To install Vitis Core Development Kit, select Vitis on the Xilinx Unified Installer. Vitis installation includes Vivado Design Suite – There is no need to install Vivado separately

The Vitis software platform consists of an integrated development environment (IDE) for interactive project development, and command-line tools for scripted or manual application development. The Vitis software platform also includes the Vivado® Design Suite for implementing the kernel on the target device, and for developing custom hardware platforms.
Some requirements listed here are only required for software acceleration features, but not for embedded software development features. Xilinx recommends installing all the required packages to have the best experience with the Vitis software platform.
To install and run on a computer, your system must meet the following minimum requirements.